KNIGHT TOUR in System Verilog

Following is the SV code for knight tour. On each randomisation, we get the next position of knight.

The concept is simple, based on which we derived the constraints.

1. knight should operate within boundaries of the chess board.
2. knight can move on any direction if it does not violate point (1).
3. The position of the knight can be taken as row, col.
4. At best it can move in 8 directions
1. If row is incremented/decremented by 2 positions, column can move 1 position from the latest row pos.
2. If row is incremented/decremented by 1 position, column can move 2 position from the latest row pos.
5. The position is calculated based on the board length, current row and column.

NOTE:

I'll check if we can walk with the knight on the chess board without repeating the same chess square again.

I doubt that there might some limitations to achieve this.

I'll  update on it, as and when I get some clues ...

CODE:

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class knight_walk; parameter int N = 5; int row; int col; rand int next_row; rand int next_col; rand int pos; function new (); row = $urandom_range(0,N-1); col = $urandom_range(0,N-1); pos = N*row + col; $display(" INITIAL POS:%0d ROW:%0d COL:%0d",pos,row,col); endfunction constraint c_knight { solve next_row before next_col; next_row inside { row+2,row-2,row+1,row-1 }; next_col inside { col+2,col-2,col+1,col-1 }; next_row inside {[0:4]}; next_col inside {[0:4]}; if( next_row inside {row+2,row-2} ) { next_col inside {col+1,col-1}; } else { next_col inside {col+2,col-2}; } } function void post_randomize(); row = next_row; col = next_col; pos = row*N+col; $display("POST_RANDOMIZE:: POS:%0d ROW:%0d COL:%0d",pos,row,col); endfunction endclass: knight_walk module top; knight_walk chess; initial begin chess = new; repeat(4) void'(chess.randomize()); end endmodule: top

RESULTS:

Compiler version S-2021.09; Runtime version S-2021.09; Apr 22 04:34 2023
INITIAL POS:3 ROW:0 COL:3
POST_RANDOMIZE:: POS:12 ROW:2 COL:2
POST_RANDOMIZE:: POS:19 ROW:3 COL:4
POST_RANDOMIZE:: POS:8 ROW:1 COL:3
POST_RANDOMIZE:: POS:1 ROW:0 COL:1
POST_RANDOMIZE:: POS:8 ROW:1 COL:3
POST_RANDOMIZE:: POS:1 ROW:0 COL:1
POST_RANDOMIZE:: POS:8 ROW:1 COL:3
POST_RANDOMIZE:: POS:1 ROW:0 COL:1
POST_RANDOMIZE:: POS:8 ROW:1 COL:3
POST_RANDOMIZE:: POS:11 ROW:2 COL:1
V C S S i m u l a t i o n R e p o r t

Another system verilog constraint problem - Base class contraint becoming invisible

 Let us walk through the following code.

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class base; rand bit [4:0] c; constraint c_x { c == 'd1; } function void display(); this.randomize(); $display("Base c:%0d",c); endfunction endclass class derived extends base; rand bit [4:0] c; constraint c_x { c == 'd2; } function void display(); this.randomize(); $display("Derived c:%0d",c); super.display(); endfunction endclass module top; derived b; initial begin b = new; repeat(2) b.display(); end endmodule

In the above code, we have 2 classes, base and derived.

Base class has variable 'c' and constraint 'c_x', the same is replicated in the derived class as well.

we have 'display' function which is used to randomize the variable and print the value. In the derived in addition to it , a super.display() was called to print the base class variable value.

When you have 2 constraints with the same name on the same variable, the constraint in the base class becomes invisible and is not applied when the variable is randomized.

Simulation results:

Contains Synopsys proprietary information.
Compiler version Q-2020.03-SP1-1; Runtime version Q-2020.03-SP1-1; Apr 22 00:47 2021
Derived c:2
Base c:27
Derived c:2
Base c:7
V C S S i m u l a t i o n R e p o r t

Reference ( comments by experts )

https://verificationacademy.com/forums/systemverilog/how-constraint-executed