System Verilog Constraints for non-overlapping memory allocation

 class ex;
 
  parameter MAX = 1024;
 
  rand int unsigned max_val[4];
  rand int unsigned min_val[4];
  rand int unsigned rng_val[4];
 
  constraint c_min_max {
    rng_val.sum() <= 1024;
    foreach(rng_val[i]) {
      max_val[i] inside { [0:MAX-1] };
      min_val[i] inside { [0:MAX-1] };
      rng_val[i] inside { [1:MAX] };
      max_val[i] == min_val[i] + rng_val[i]-1;
      if(i > 0) min_val[i] > max_val[i-1];
    }
  }
 

 
  function void post_randomize();
    foreach(rng_val[i])
    $display("MAX:%0d | MIN:%0d | RNG:%0d",max_val[i],min_val[i],rng_val[i]);
  endfunction  
 
endclass

module top;
  ex e;
 
  initial begin
    e = new;
    void'(e.randomize());
  end
endmodule

 

Simulation:

ompiler version P-2019.06-1; Runtime version P-2019.06-1; Aug 18 06:16 2020
MAX:144 | MIN:20 | RNG:125
MAX:271 | MIN:151 | RNG:121
MAX:457 | MIN:274 | RNG:184
MAX:574 | MIN:459 | RNG:116