One of the common interview question in system verilog is about populating the array with unique elements.
One way to generate is using "unique" keyword.
constraint c_array { unique { arr }; }
Another way to achieve this by using randc.
Check this out .....
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 | class randm; randc bit [15:0] addr; constraint c_addr { addr inside {[1:10]}; } endclass: randm class test; bit [15:0] addr_a[10]; function void post_randomize(); randm c = new; foreach(addr_a[i]) begin void'(c.randomize()); addr_a[i] = c.addr; end $display("ADDR:%p",addr_a); endfunction endclass module top; test t; initial begin t = new; t.randomize(); end endmodule |
class "randm" contains randc addr, which can be used to generate a unique value every time class_handle.randomize is called.
instead of using any constraint on array, we can use the post_randomize method to populate the array with unique elements.
Results:
ADDR:'{'h2c, 'h34, 'h47, 'h6, 'h4f, 'h3c, 'h21, 'h29, 'h16, 'h5f}
xmsim: *W,RNQUIE: Simulation is complete.